I2C Master Block Icon
BUS I2C MASTER Block The BUS I2C Master block configures and executes I2C (Inter-Integrated Circuit) communication sequences as a bus master. This block enables reading from and writing to I2C slave devices using a graphical sequence builder that supports complex multi-device transactions.

Block Inputs/Outputs

Inputs: Dynamic based on I2C sequence configuration

Port NameData TypeDescriptionOptional
Addr Nuint8/uint16Slave address (when using block input)Yes
Write Nuint8 (vector)Data to write to slave deviceYes

Outputs: Dynamic based on I2C sequence configuration

Port NameData TypeDescriptionOptional
Seq CompletedbooleanIndicates sequence completion (non-blocking mode)Yes
Out Nuint8 (vector)Data read from slave deviceYes

Dynamic Port Configuration

Block inputs and outputs are created based on the I2C sequence you configure:

  • Read Data actions create output ports with the read data
  • Write Data actions with block input enabled create input ports
  • Write Address actions with block input enabled create address input ports
  • Sequence Completed output available in non-blocking mode

Block Input/Output Datatype

I/O TypeData TypeRangeDescription
Address (7-bit)uint80-127Standard I2C slave address
Address (10-bit)uint160-1023Extended I2C slave address
Write Datauint80-255Byte data to write
Read Datauint80-255Byte data read from slave
Seq Completedboolean0/1Sequence completion status

Supported Device Families

FamilySeriesI2C ModulesNotes
dsPIC30FAllI2C1Legacy I2C peripheral
dsPIC33F/EAllI2C1-2Standard I2C with enhancements
dsPIC33CCK, CH, CDVI2C1-3Multi-module support
dsPIC33AAKI2C1-4Latest I2C peripheral (DOS-05155)
PIC32MK, MZ, MXI2C1-532-bit I2C (DOS-01441)
SAME5x, C2x, D2xSERCOM0-7I2C via SERCOM peripheral
SAME70, S70, V71TWIHS0-2Two-Wire High Speed interface

Block Parameters

I2C Module Selection
ParameterDescriptionOptions
I2C ModuleHardware I2C peripheral to useI2C1, I2C2, … (device dependent)
I2C Sequence Builder (GUI)

The I2C block uses a graphical sequence builder accessed by double-clicking the block. Available actions:

ActionDescriptionParameters
Initial ConfigurationSet I2C clock speed and modeFrequency, mode bits
Update ConfigurationChange settings mid-sequenceSame as initial
StartGenerate I2C start conditionNone
Re-StartGenerate repeated startAuto-rethrows address if followed by R/W
StopGenerate I2C stop conditionNone
Write AddressSend slave address7/10-bit, R/W bit, constant or block input
Write DataSend data bytesByte count, constant or block input
Read DataReceive data bytesByte count, output port name
Set PinControl GPIO during sequencePin, state (0/1/toggle)
DelayInsert timing delayDelay in seconds
InterruptTrigger user interruptInterrupt name
Operating Mode
ParameterOptionsDescription
Blocking ModeOn/OffOn: Block waits for sequence completion. Off: Non-blocking with completion output
Sequence CompletedOn/OffEnable output port showing sequence status (non-blocking only)
Pin Configuration
ParameterDescription
SDA PinI2C data pin (bidirectional)
SCL PinI2C clock pin (output in master mode)

Note: I2C pins are typically not remappable via PPS - they are fixed to specific pins or selectable via fuses.

Interrupt Configuration
ParameterRangeDescription
Interrupt Priority1-7I2C interrupt priority level

I2C Clock Speed

Clock speed is configured in the Initial Configuration action. Available frequencies depend on the peripheral clock:

ModeTypical SpeedUse Case
Standard100 kHzGeneral purpose, longer wires
Fast400 kHzCommon sensor communication
Fast+1 MHzHigh-speed peripherals

The block automatically calculates the optimal I2CBRG register value for the requested frequency based on FCY.

Implementation Details

Sequence Execution

The I2C sequence is executed as a state machine:

  1. Each action in the sequence is processed sequentially
  2. Hardware interrupts handle byte-level timing
  3. Completion status available in non-blocking mode

Buffer Management

Buffer TypeDescription
Input Buffer (8-bit)Stores data to write from block inputs
Input Buffer (16-bit)Stores 10-bit addresses from block inputs
Output BufferStores data read from slave devices

Buffer sizes are automatically calculated from sequence configuration.

Device-Specific Implementations

ArchitecturePeripheralRegister Naming
dsPIC30F/33FStandard I2CI2CCON, I2CSTAT, I2CBRG
dsPIC33E/CEnhanced I2CI2CxCONL, I2CxSTAT, I2CxBRG
dsPIC33ANew I2C (DOS-05155)I2CxCONL, 24-bit BRG
PIC3232-bit I2C (DOS-01441)I2CxCON, 16-bit BRG
SAM E5x/C2xSERCOM I2CSERCOM.I2CM registers
SAM E7xTWIHSTWIHS.CWGR, TWIHS.CR

Usage Examples

Example 1: Read Temperature Sensor (Single Register)

Typical sequence for reading a temperature sensor like TMP102:

1. Initial Configuration (400 kHz)
2. Start
3. Write Address: 0x48 (Write)
4. Write Data: 0x00 (temperature register)
5. Re-Start
6. Write Address: 0x48 (Read)
7. Read Data: 2 bytes → Output "Temperature"
8. Stop

Example 2: Write EEPROM Data

Write data to an I2C EEPROM:

1. Initial Configuration (400 kHz)
2. Start
3. Write Address: 0x50 (Write)
4. Write Data: [HighAddr, LowAddr] (memory address)
5. Write Data: [Data1, Data2, ...] (from block input)
6. Stop

Example 3: Multi-Device Transaction

Read from multiple sensors in one sequence:

1. Initial Configuration (400 kHz)
2. Start
3. Write Address: Device1
4. Read Data → Output "Sensor1"
5. Re-Start
6. Write Address: Device2
7. Read Data → Output "Sensor2"
8. Stop

Troubleshooting

I2C Not Communicating

Problem: No data on I2C bus.

Solutions:

  • Verify SDA and SCL pin assignments match hardware
  • Check pull-up resistors on SDA and SCL lines (typically 4.7kΩ)
  • Verify slave device address (7-bit, not 8-bit with R/W)
  • Check clock frequency compatibility with slave device

NAK Received

Problem: Slave returns NAK (no acknowledge).

Solutions:

  • Verify slave address is correct
  • Check if slave device is powered and responding
  • Ensure addressing mode (7/10-bit) matches slave
  • Check for bus contention with other masters

Clock Stretching Timeout

Problem: Slave stretches clock too long.

Solutions:

  • Increase timeout settings if available
  • Verify slave device operation
  • Check for firmware issues on slave device

Pin Warning Messages

Problem: “I2C Port SCL/SDA not available” warning.

Solutions:

  • I2C pins are fixed on many devices - check datasheet
  • Verify correct alternate pin selection via fuses
  • Some chips have alternate I2C pin options (ASCL, ASDA)

See Also