Inputs:
| Port Name | Data Type | Description | Optional |
|---|---|---|---|
| N | uint8/uint16 | Number of bytes to send (variable length mode) | Yes (enable via parameter) |
| Tx | uint8 (vector or scalar) | Data to transmit | No (always present) |
| $ | any | Function-Call input (triggers execution) | Yes (based on ordering) |
Outputs:
| Port Name | Data Type | Description | Optional |
|---|---|---|---|
| N | uint8/uint16 | Number of bytes actually sent | Yes (enable via parameter) |
| $ | function-call | Function-Call output (execution chain) | Yes (based on ordering) |
The block accepts and outputs uint8 data values for UART transmission.
| I/O Type | Range | Description |
|---|---|---|
| uint8 (input) | 0 to 255 | Raw byte data to transmit |
| uint8/uint16 (N output) | 0 to buffer size | Number of bytes successfully sent |
| Family | Series | Architecture ID | Implementation Files |
|---|---|---|---|
| dsPIC | 30F, 24F, 33F, 33E, 33C, 33A | 1, 2, 3, 4, 8 | PIC bare, Interrupt, DMA variants |
| PIC32 | MK, MZ, MX, PIC32A | Included in dsPIC arch | Same as dsPIC (PIC implementations) |
| SAM E7x/S7x | SAME70, SAMS70, V71, PIC32CZ MC70 | 5 | SAMx7 bare, Interrupt, DMA ping-pong |
| SAM E5x/D5x | SAME5x, SAMD5x | 6 | SAMx5 bare, Interrupt, DMA ping-pong |
| SAM C2x/D2x | SAMC2x, SAMD2x, SAMDA1 | 7 | SAMx5 implementations (shared) |
| Parameter | Options | Description |
|---|---|---|
| NSend Input | On/Off checkbox | Enable ‘N’ input port for variable-length transmission |
| NSend Output | On/Off checkbox | Enable ‘N’ output port (bytes actually sent) |
| UART String Mode | On/Off checkbox | When enabled: ‘0’ (null character) marks end of string |
| All or Nothing | On/Off checkbox | Only transmit if entire buffer can be sent (no partial sends) |
Transmission behavior depends on the implementation mode selected in the UART Config block:
| Mode ID | Implementation | Description | Thread Protection |
|---|---|---|---|
| 1 | Bare (Simplest) | Direct write to hardware FIFO (1/4/8 bytes) | Optional delay protection |
| 2 | Circular Buffer | Software buffer with interrupt-driven transmission | Critical section protection |
| 3 | DMA Ping-Pong | Two DMA buffers alternating (no data loss) | DMA channel management |
| 4 | DMA Single Buffer | Single DMA buffer (possible data loss if full) | DMA channel management |
| 5 | DMA Circular Buffer | DMA with circular buffer (same as mode 2) | Critical section protection |
The block provides configurable thread protection for multitasking environments:
0x1: Delay task, don’t care interrupts0x5: Delay all interrupts0x9: Delay task, don’t send on interrupts0xA: Don’t send (disabled)Add UART Config block (configure for UART 1, Circular Buffer Tx)
Add UART Tx block
Configure UART Tx:
UART Module: 1
NSend Input: Off
NSend Output: Off
UART String Mode: Off
All or Nothing: Off
Connect uint8 vector [5x1] to Tx input
Build and deploy
Configure UART Tx block:
NSend Input: On
NSend Output: On (monitor bytes sent)
UART String Mode: On
All or Nothing: Off
Connect N input with dynamic length (e.g., from lookup table)
Connect Tx input with uint8 buffer [maxSize x 1]
Monitor N output to verify transmission
Writes directly to hardware FIFO:
U%TXREG = data[i]; /* Direct write to transmit register */
If no UART Config block is found for the selected UART:
Problem: UART Tx block present but no data on TX line.Solutions:
Problem: Some bytes missing from transmission.Solutions:
Problem: Data corruption in multitasking model.Solutions:
[Communication Blocks] | [UART Config] | [UART Rx] | Code Generation