Digital Output Write Block Icon
The Digital Output Write block is the core digital output writing block that directly controls GPIO pins via LAT register writes. This block configures pins as outputs, sets initial values, and provides options for atomic multi-pin updates and electrical characteristics configuration. Key Features: - [Electrical Specifications and Current Limits] - Microchip Device Datasheet - GPIO/LAT/TRIS/ODC sections

Overview

The Digital Output Write block is the core digital output driver that directly controls GPIO pins via LAT register writes. Selected pins are configured as digital outputs with user-selectable push-pull or open-drain modes. When the block input is defined as one uint16, the value is used as-is without masks, which may affect other pins on the same port if they are also configured as digital outputs.

When to use:

  • Direct control of GPIO output pins
  • When building custom subsystems with output functionality
  • For atomic multi-pin updates on the same port
  • Low-level output control with precise electrical characteristics

When NOT to use:

  • When you need read-back capability (use Digital Output block instead)
  • For PWM signal generation (use PWM blocks)

Block Dialog

No screenshot available โ€” block uses standard parameter dialog similar to Digital Output.

Ports

Input

PortData TypeDescription
Port signalboolean or uint16Digital value to write to selected pin(s). If multiple pins are selected without PACK option, each pin requires its own boolean input. If PACK option is enabled, a single uint16 input sets multiple pins via bit positions.

Parameters

ParameterVariableTypeDescription
PortPORTpopupGPIO port selection (A, B, C, etc.). Dynamically populated based on target device pin map. Shows available pin indices for each port.
PinsPINeditArray of pin indices to control, e.g., [0] or [0 1 2]. Valid range is [0..15] for 16-bit ports or [0..31] for 32-bit ports. Out-of-range or unavailable pins are automatically filtered out with a warning. Defaults to [0] if left empty.
Initial OutputINIT_VALUEeditChip-dependent. Initial pin state at startup. Accepts scalar (applies to all pins), vector (per-pin values), or bitmask (when PACK enabled):
โ€ข Scalar -1 or negative: “don’t care” (leaves pin at reset state)
โ€ข Scalar 0 or 1: applies to all pins
โ€ข Scalar >1: interpreted as bitmask, bitwise-AND with selected pin mask
โ€ข Vector: per-pin values, extended or truncated to match number of pins. Visible on dsPIC30F, dsPIC33F, dsPIC33E, dsPIC33C, dsPIC33A, PIC32, PIC32A (Arch 1,2,3,4,8). Hidden on SAM devices.
set input as one uint16/uint32PACKcheckboxWhen enabled, accepts a single uint16 (16-bit ports) or uint32 (32-bit ports) input where bit positions correspond to pin numbers. Atomic write: When all selected pins are present and TRIS is fully configured, LAT register is written directly without read-modify-write. Otherwise, uses masked update.
Request exact simultaneous writeSIMULTANEOUScheckboxConditional. When enabled, all pins are written to LAT register in a single instruction using read-modify-write sequence. Only visible when multiple pins are selected AND PACK is disabled.
Output modeOUTPUT_PIN_MODEpopupChip-dependent. Electrical configuration: Push-Pull (default) for standard CMOS output, or Open Drain for open-collector applications. Only visible on dsPIC33E, dsPIC33C, dsPIC33A, PIC32, PIC32A (Arch 3,4,8). Hidden on older dsPIC30F/33F and SAM devices.
Block execution orderingORDERINGpopupControls block scheduling: None, Input, Output, or Input & Output.
Sample TimeSampleTimeeditSampling interval in seconds. Use -1 for inherited sample time.

Device Support

Initial Output Parameter Visibility:

  • Visible: dsPIC30F, dsPIC33F, dsPIC33E, dsPIC33C, dsPIC33A, PIC32, PIC32A (Arch 1,2,3,4,8)
  • Hidden: All SAM (SAME70/SAMS70/SAMV71/SAMx2/SAMx5) devices
    • When hidden, pins start at hardware reset state (typically Hi-Z)

Output Mode Parameter Visibility:

  • Visible (Push-Pull/Open Drain): dsPIC33E, dsPIC33C, dsPIC33A, PIC32, PIC32A (Arch 3,4,8)
  • Hidden (Push-Pull only): dsPIC30F, dsPIC33F (Arch 1,2) and all SAM devices
    • When hidden, pins use standard Push-Pull CMOS output mode
    • Open Drain mode is only available on newer dsPIC and PIC32 families

Generated Code Optimization (PACK mode):

  • Full port write: When all selected pins are outputs AND (PinsBitmask | TRIS) == 0xFFFF, generates direct LAT assignment: LAT%<PORT> = input;
  • Masked write: Otherwise, generates read-modify-write with XOR mask: LAT%<PORT> ^= (mask & (LAT%<PORT> ^ input));
  • This optimization is implemented in MCHP_Digital_Output.tlc lines 62-71

INIT_VALUE Processing:

  • Scalar -1 or any negative value: No initialization code generated (MCHP_PORT does not include INIT0 or INIT1)
  • Scalar 0 or 1: Applied to all pins (MCHP_PORT includes ,INIT0 or ,INIT1 for each pin)
  • Scalar >1: Bitwise-AND with selected pin mask, then each pin gets individual INIT bit
  • Vector: Each pin gets its corresponding vector element (clamped to 0/1), extended with last value if needed

Examples

Programmatic Setup

% Add block to model
add_block('MCHP_Blockset/Digital IO/Digital Output\nWrite', [mdl '/DigitalOut']);

% Configure key parameters
set_param([mdl '/DigitalOut'], 'PORT', 'B');
set_param([mdl '/DigitalOut'], 'PIN', '0');
set_param([mdl '/DigitalOut'], 'INIT_VALUE', '0');
set_param([mdl '/DigitalOut'], 'OUTPUT_PIN_MODE', 'Push-Pull (default)');

Troubleshooting

Problem: Output doesn’t drive high in Open Drain mode

  • Solution: Open Drain outputs require external pull-up resistors. Check your hardware configuration or switch to Push-Pull mode.

Problem: Pins toggle unexpectedly when using PACK mode

  • Solution: In PACK mode, the uint16 input directly writes to LAT register bits. Ensure only the intended bits are set in your input value. Other output pins on the same port will be affected.

Problem: Initial Output value not applied at startup

  • Solution: Verify INIT_VALUE is set to 0 or 1. The value -1 means “unchanged” and leaves the pin in its reset state (typically input/high-impedance).