PWM SAM7x

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Advanced PWM peripheral for SAM ARM Cortex-M microcontrollers. Provides complementary PWM with dead-time, fault protection, and pattern generation for motor control applications.

Overview

The PWM SAM7x block configures the Pulse Width Modulation Controller (PWMC) peripheral on SAME7x/SAMS7x/SAMV7x microcontrollers. Each controller (PWM0 or PWM1) supports up to 4 independent PWM channels with complementary high/low outputs, programmable dead-time, and fault protection.

When to use:

• Motor control and power conversion on SAM E7x, SAM S7x, SAM V7x, or SAM RH71 devices
• Applications requiring up to 4 complementary PWM channels per controller (8 total with PWM0+PWM1)
• Push-pull mode for half-bridge topologies
• PWM event line triggers for ADC synchronization (8 comparators)

When NOT to use:

• SAM E5x, SAM C2x, or SAM D2x devices → use TCC PWM
• dsPIC devices → use PWM , PWM HighSpeed , or PWM HS FEP depending on family

Key Features:

• Up to 4 PWM channels per controller with complementary outputs (PWMH/PWML)
• Left-aligned or center-aligned PWM generation
• Independent or synchronized channel operation
• Programmable dead-time insertion (8-bit resolution per channel)
• 8 fault input sources with configurable protection
• Event line triggers for ADC synchronization (8 comparators)
• Push-pull mode for half-bridge topologies
• Individual signal polarity inversion

Block Dialog

Signals Tab

Initial Values Tab

Block Inputs Tab

Fault Tab

Ports

Inputs

Input Scaling:

• Uint raw input: Direct 16-bit register value (0 to PWMxmax variable)
• FP [0 1]: 0.0 = 0% duty, 1.0 = 100% duty
• FP [-1 1]: -1.0 = 0%, 0.0 = 50%, 1.0 = 100%
• FP physical scaling (s): Absolute time in seconds

Outputs

The block has no outputs. PWM signals are generated directly on configured pins.

Notes

Multiple Block Instances

Multiple instances of the PWM SAM7x block can control different channels of the same controller, but shared parameters (clock, center-aligned mode, synchronization) must match exactly or a compilation error will occur. The TLC code validates consistency using MchpLocal2Global().

Synchronized Mode Restrictions

When PWM_SyncWithPWM0 = on:

• Channel 0 period controls all synchronized channels
• Individual period updates are ignored
• Duty cycle remains independently controllable per channel
• All synchronized channels must use the same clock source

Dead-Time Limitations

• Dead-time resolution: 8 bits (0–255 prescaler ticks)
• Maximum dead-time depends on prescaler (e.g., 26.6 µs at 150 MHz with DIV1)
• Applied symmetrically (same dead-time for rise/fall transitions)
• Configured per channel, not per output

Clock Resolution Trade-off

The block automatically selects prescaler (PREA, DIVA) to achieve:

• Maximum period ≤ requested MaxPeriod_s
• Maximum PWM resolution (16-bit counter utilization)

Higher MaxPeriod_s → coarser duty cycle steps. For 20 kHz @ 150 MHz: ~7500 steps.

Device Support

• SAM E70 (SAME70Q19/20/21, SAME70N19/20/21, SAME70J19/20/21)
• SAM S70 (SAMS70Q19/20/21, SAMS70N19/20/21, SAMS70J19/20/21)
• SAM V70 (SAMV70Q19/20, SAMV70N19/20, SAMV70J19/20)
• SAM V71 (SAMV71Q19/20/21, SAMV71N19/20/21, SAMV71J19/20/21)
• SAM RH71 (SAMRH71F20)

All devices feature two independent PWM controllers (PWM0, PWM1) with 4 channels each.

Examples

Three-Phase Motor Control (Center-Aligned)

% SAME70 FOC motor drive, 20 kHz PWM, 1 µs dead-time
PWMx = 'PWM Controller 0';
MaxPeriod_s = 1/20e3;  % 50 µs = 20 kHz
PWM_Centered = 'on';
PWM_SyncWithPWM0 = 'on';

% Enable 3 channels
PWM0_pinH0 = 'PA11 / Pin[64]';  % Phase U
PWM0_pinL0 = 'PD24 / Pin[55]';
PWM0_pinH1 = 'PA2 / Pin[93]';   % Phase V
PWM0_pinL1 = 'PA20 / Pin[22]';
PWM0_pinH2 = 'PA13 / Pin[42]';  % Phase W
PWM0_pinL2 = 'PA16 / Pin[45]';

InitPeriod_s = 1/20e3;
InitDutyCycle_s = [25e-6, 25e-6, 25e-6];  % 50% initial
InitDeadTimeH_s = 1e-6;
InitDeadTimeL_s = 1e-6;

% Runtime duty cycle control
BlockInput_DutyCycle = 'a Floating Point input within range [0 1]';
BlockInput_VectorScalar = 'Vectors (grouped by function)';

% Connect 3-element duty cycle vector from FOC algorithm

Single-Phase with ADC Synchronization

% Sync ADC sampling to PWM peak (for current sensing)
PWMx = 'PWM Controller 0';
MaxPeriod_s = 100e-6;  % 10 kHz
PWM0_pinH0 = 'PA11 / Pin[64]';
PWM0_pinL0 = 'PD24 / Pin[55]';

% Trigger ADC at 90% of period (valley sampling)
InitEventLine0_ComparatorValue_s = 90e-6;

% Enable ADC block with "PWM Event Line 0" trigger source

Fault Protection with Over-Current Trip

% Set all outputs to high-Z on AFEC0 fault (analog comparator result)
Fault_Input4 = 'trig a fault';  % AFEC0
Fault_Input4_FFIL = 'on';       % Filter glitches

Fault_FPV0 = 'PWM H/L -> ZZ';   % High impedance
Fault_FPV1 = 'PWM H/L -> ZZ';
Fault_FPV2 = 'PWM H/L -> ZZ';

% Configure AFEC0 to compare current sense ADC against threshold

Related Blocks

• PWM SAM7x Override — Manual output control and emergency shutdown
• MCHP_ADC_SAM — ADC with PWM event line synchronization
• MCHP_QEI_SAM — Quadrature encoder for motor feedback