Overview

System Configuration blocks provide essential initialization, clock configuration, scheduler control, and performance monitoring for embedded applications. The MPLAB Blockset includes the Master block (required in every model), scheduler configuration, compiler optimization controls, and system monitoring blocks for robust embedded system development.

Core System Blocks

Master - System Initialization and Clock Configuration


Scheduler Configuration Blocks

Scheduler Options - Multitasking Scheduler Configuration


Tasks State - Task Execution Status


Performance Monitoring Blocks

MCU Load - CPU Utilization Measurement


MCU Overload - Task Overrun Detection


Compiler Configuration Blocks

Compiler Options - Compiler Optimization Control


Idle Task - Background Task Configuration


Interrupt - Custom Interrupt Service Routine


Block Selection Guide

Essential Blocks (Required)

BlockRequired?When to Use
MCHP_Master✅ AlwaysEvery model must have exactly one Master block
MCHP_Scheduler_Options⚠️ Multi-rateUse when model has multiple sample rates
MCHP_Compiler_OptionsOptionalWhen fine-tuning performance or code size
BlockPurposeUse Case
MCHP_MCU_LoadMonitor CPU usageDevelopment, optimization, validation
MCHP_MCU_OverloadDetect deadline violationsSafety-critical, real-time validation
MCHP_Tasks_StateTrack task executionDebugging scheduler behavior

Scheduler Behavior and Best Practices

Rate Monotonic Scheduling

Priority Assignment:

  • Highest Rate = Highest Priority
  • Example: 10 kHz task preempts 1 kHz task

Preemption:

  • Enabled: Higher priority tasks interrupt lower priority
  • Disabled: Tasks run to completion (simpler, less overhead)

When to Use Preemption:

  • ✅ Motor control (fast current loop must preempt slower loops)
  • ✅ Safety-critical tasks with tight deadlines
  • ❌ Simple applications (CPU overhead not worth benefit)
  • ❌ Legacy code with non-reentrant functions

CPU Load Guidelines

CPU LoadInterpretationAction
< 50%✅ Healthy headroomNormal operation
50-70%⚠️ Moderate loadMonitor, optimize if growing
70-90%🔶 High loadOptimize algorithms, reduce sample rates
> 90%🔴 CriticalImmediate optimization or faster MCU
≥ 100%❌ OverrunDeadline violations, system unstable

Troubleshooting Common Issues

Task Overruns

Symptoms: MCU_Overload flag set, erratic behavior

  • Check: CPU load > 100%
  • Fix 1: Reduce algorithm complexity
  • Fix 2: Increase sample period (lower task rate)
  • Fix 3: Enable compiler optimization (-O2 or -O3)
  • Fix 4: Move slow code to lower-priority task

Scheduler Not Working

Symptoms: Only one task executes, others ignored

  • Check: Multiple sample rates defined in Simulink model
  • Check: Scheduler_Options block present
  • Check: Fixed-step solver enabled (not variable-step)
  • Check: Tasks_State output shows task switching

Clock Configuration Errors

Symptoms: Timing incorrect, UART baud rate wrong

  • Check: Master block clock settings match hardware oscillator
  • Check: PLL configuration correct for target frequency
  • Check: Verify actual instruction cycle with oscilloscope

Device Family Support Summary

System BlockdsPIC30FdsPIC33FdsPIC33EdsPIC33CdsPIC33APIC24PIC32SAM
MCHP_Master
Scheduler_Options
Tasks_State
MCU_Load
MCU_Overload
Compiler_Options
Idle_Task
Interrupt

Legend: ✅ Full Support

All system configuration blocks support all device families. Device-specific details are automatically handled by each block based on the selected target MCU.


See Also

Related Block Categories:

Recommended Reading:

  • Rate Monotonic Scheduling theory
  • Real-time system design patterns
  • Compiler optimization trade-offs

Example Projects:


💡 Quick Setup Guide:

  1. Every model needs: MCHP_Master block (required)
  2. Multi-rate models need: MCHP_Scheduler_Options
  3. Performance monitoring: MCHP_MCU_Load + MCHP_MCU_Overload
  4. Optimization: MCHP_Compiler_Options for critical code

CompilerOptimisation

The CompilerOptimisation block configures compiler toolchain, optimization levels, Device Family Pack (DFP) selection, and linker options for …

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IdleTask

Idle Task Characteristics: - Lowest priority - Preempted by any scheduled task or interrupt - Non-deterministic timing - Execution time varies with …

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Interrupt

The Interrupt block creates interrupt-driven subsystems by connecting peripheral interrupt sources to Simulink triggered subsystems. The block …

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Master

CRITICAL: The Master block is MANDATORY in every MCHP Blockset model. This is always the FIRST block to add to any new model. Without it, no other …

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MCU LOAD

The MCU LOAD block measures and outputs the real-time CPU utilization percentage, providing essential feedback for performance optimization and …

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MCU OVERLOAD

The MCU OVERLOAD block detects when scheduled tasks miss their deadlines and provides diagnostic information for identifying the cause of overload …

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Scheduler Options

The Scheduler Options block configures the behavior of the built-in Rate Monotonic Scheduler used for multitasking in MCHP Blockset models. The …

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SECONDARY CORE

The SECONDARY CORE block configures the secondary (slave) core in dual-core dsPIC33CH devices. Dual-Core Architecture Feature Master Core Secondary …

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Tasks State

The Tasks State block outputs the current execution state of all scheduled tasks, providing real-time visibility into the multitasking scheduler …

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