SECONDARY CORE
Dual-Core Architecture
| Feature | Master Core | Secondary Core |
|---|---|---|
| Device Name | 33CH128MP508 | 33CH128MP508S1 |
| Purpose | System management | Real-time control |
| Communication | MSI mailboxes, FIFO | MSI mailboxes, FIFO |
Development Workflow
% Step 1: Create MASTER core project
Model: Master_Control.slx
MCHP_Master → PICREF: 33CH128MP508 (master)
% Step 2: Create SECONDARY core project
Model: Secondary_FastLoop.slx
MCHP_Master → PICREF: 33CH128MP508S1 (slave)
% Step 3: Build both projects
1. Build secondary → generates .s image file
2. Build master → links secondary image
3. Program master (includes slave code)
See Also
- [MCHP_Master] - Target device configuration